Commit Graph

278 Commits (a51681811fffddaa076e68b891ff593f69ca18b0)
 

Author SHA1 Message Date
Anton Lydike cd5795bb74 fixed priv start code, added tests 3 years ago
Anton Lydike 4f1c73df9e various small bugfixes 3 years ago
Anton Lydike 881f4004ed fixed removed argparse line in riscemu.__init__.py 3 years ago
Anton Lydike 6fa3558f6c added interactive mode, fixed some bugs 3 years ago
Anton Lydike 3d2619c258 created a better output for reads/writes outside of known regions 3 years ago
Anton Lydike 185ae8b94e added config and better loading code to CPU base 3 years ago
Anton Lydike 2880a59dbb fixed ascii escape sequences and section address calculation 3 years ago
Anton Lydike 7904a4dae8 added verbosity control to user mode emulator 3 years ago
Anton Lydike b396e0c5eb user mode emulator finally working again 3 years ago
Anton Lydike 5538034f8b started with base type overhaul 3 years ago
Anton Lydike 0488a9d6bc finished basic RISC-V parser 3 years ago
Anton Lydike dc4dca6fea [wip] almost done with the rework of the parser and internal data structure representation of programs 3 years ago
Anton Lydike 84562de98f added tests for tokenizer 3 years ago
Anton Lydike d5a4acef67 tokenizer reimplemented 3 years ago
Anton Lydike 52e189c226 fixed missing newline at the end of the file 3 years ago
Anton Lydike b317974dcc made sure register values adhere to correct 32bit two's complement standard - fixes #4 3 years ago
Anton Lydike a0259707b2 Released v1.0.0 to PyPi 3 years ago
Anton Lydike e65775774a extended userspace RV32I with li, la and mv instruction 3 years ago
Anton Lydike e9c11e9a41 added correct instruction printing 3 years ago
Anton Lydike 0b34aea520
Merge pull request #1 from AntonLydike/kernel-mode
Adding limited privileged emulation using the `riscemu.priv` module
3 years ago
Anton Lydike 7ab3f8361d code cleanup to increase visibility 3 years ago
Anton Lydike d09b7a5cb1 overhaul of debugging info printing 3 years ago
Anton Lydike d0c5abe845 added a whole lot of debugging info for privileged emulation 3 years ago
Anton Lydike 3d4d36bfe4 moved dependency on pyelftools into scoped function where it's used to reduce the number of dependencies required overall 3 years ago
Anton Lydike 0c96a87dcb added RV32A extension, only missing LR.W and SC.W 3 years ago
Anton Lydike 3033eb9985 tranlsation from absolute addressed to symbol-relative names for debugging 3 years ago
Anton Lydike ca71e196c2 added verbose flag and improved verbose output 3 years ago
Anton Lydike f2d07f90b5 priv: added __main__ script to module which correctly configures the cpu depending on --kernel or --image options 3 years ago
Anton Lydike 0651eabe18 fixed how ecalls are represented and handled 3 years ago
Anton Lydike 684c858300 added support for IO modules 3 years ago
Anton Lydike df9e610d14 forgot to commit image loader code 3 years ago
Anton Lydike 1f03449694 added memory image support to priv emulator 3 years ago
Anton Lydike 4c352d8567 [MMU] caching last used code section 3 years ago
Anton Lydike e8685af328 [PrivMMU] cleaned up file formatting 3 years ago
Anton Lydike 3d07c97a52 [PrivCPU] improved step function performance by checking time every tenth cycle 3 years ago
Anton Lydike 60a2a8d546 [CSR] adding cache to mstatus register 3 years ago
Anton Lydike 6b4f38d030 [ElfLoader] added cache for already decoded instructions 3 years ago
Anton Lydike 05c17bc029 [PrivCPU] fixed debugger skipping over ebreak instructions 3 years ago
Anton Lydike baa1f24eb7 [CpuTraps] fixed formatting for mcause registers 3 years ago
Anton Lydike 777717ed2e [PrivRV32I] fixed csrrw instruction to correctly switch register contents 3 years ago
Anton Lydike c7b3693740 [Regsietrs] ensuring register values are 32bit 3 years ago
Anton Lydike cc598c0910 [PrivCPU] changed timer compare to lower equals to trigger exactly on time 3 years ago
Anton Lydike affaa60d22 [PrivCPU] adding performance counter 3 years ago
Anton Lydike 48ce44993b [CSR] Adding dump_mstatus method to csr 3 years ago
Anton Lydike 639f91b192 [decoder] removed sign extension for CSR type instructions 3 years ago
Anton Lydike c25b9f2343 [PrivCPU] implemented CPU interrupt handling context switch 3 years ago
Anton Lydike 4c7f3ffe67 [PrivCPU] fixed perf-counter not comparing against shifted time 3 years ago
Anton Lydike c2002cd46d [PrivCPU] fixed naming for csr mtimecmp callback function 3 years ago
Anton Lydike 5b2b12507d [PrivRV32I] added half od csrrs instruction (reading only) 3 years ago
Anton Lydike 052ad56310 [CSR] fixed call to enum value member 3 years ago