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262 Commits 5 Branches 2 Tags 5.2 MiB
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Author SHA1 Message Date
Anton Lydike
be0591ed25 release of 2.0.3 2022-04-18 22:17:23 +02:00
Anton Lydike
d353353748 fixed link in syscall docs 2022-04-18 20:30:41 +02:00
Anton Lydike
ce5b01d463 Parser: fixed error when labels where used outside of sections 2022-04-18 20:26:19 +02:00
Anton Lydike
204d2c9a5b Syscalls: cleaned up formatting and added instructions for extensions 2022-04-18 20:25:35 +02:00
Anton Lydike
10a3c4201e cleaned up and improved memory dumping code 2022-04-17 12:34:07 +02:00
Anton Lydike
5a07770427 fixed a bug with hex literal recognition 2022-04-17 12:32:36 +02:00
Anton Lydike
39e759ae9b fixed bug where wrong parts of section would be printed in mmu.dump() 2022-04-17 12:32:15 +02:00
Anton Lydike
65903189a2 removed tests for bind_twos_complement 2022-04-17 11:51:29 +02:00
Anton Lydike
629786931e fixed address translation error for sections without symbols 2022-04-17 11:14:03 +02:00
Anton Lydike
bb770ab43c Logging: Changed verbosity levels at which things are logged for the CPU 2022-04-17 10:42:08 +02:00
Anton Lydike
8dea2036c5 added changelog - release of 2.0.2 2022-04-08 21:10:08 +02:00
Anton Lydike
83d8412fff add /build to idea excluded dirs 2022-04-08 21:02:02 +02:00
Anton Lydike
0c39a9eefb fixes #12 - exit program with code from cpu.exit_code 2022-04-08 21:00:56 +02:00
Anton Lydike
761799c17a Parser: fixes #13 - implicit start of text section when parsing assembly 
When an assembly file starts with instructions without explicitly
declaring any section beforehand, a .text section will be created
implicitly.
 2022-04-08 20:54:40 +02:00
Anton Lydike
baf4485143 release of 2.0.1 2022-04-01 14:46:20 +02:00
Anton Lydike
4d2d65a10d fixed type annotations type in parsers 2022-04-01 13:30:55 +02:00
Anton Lydike
d18843a88b release of 2.0.0 2022-03-31 22:49:45 +02:00
Anton Lydike
4b77ce05a7
Merge pull request #5 from AntonLydike/assembly-parser-rework 
- Completely revamped parsing of readable assembly
 - Completely revamped internal types
 - Added hard and correct 32 bit integer handling in registers
 2022-03-31 22:47:55 +02:00
Anton Lydike
fe4b3efb6f fixes #10 - fixed how preconfigured memory is handled 2022-03-31 22:46:23 +02:00
Anton Lydike
663721b306 pre-release 2.0.0a4 2022-03-28 00:04:50 +02:00
Anton Lydike
4004c5ee6d squashing bugs related to Int32 wrapping and sign extension 2022-03-27 23:50:28 +02:00
Anton Lydike
c2b6385523 version 2.0.0a3 2022-03-27 22:10:20 +02:00
Anton Lydike
b7f1365155 ported syscalls to Int32 usage and removed unecessary prints 2022-03-27 22:00:22 +02:00
Anton Lydike
fa4a9b92f3 fixed imports in types/instruction_memory_section 2022-03-27 20:26:09 +02:00
Anton Lydike
57f827ba6a updated version to 2.0.0a2 2022-03-27 20:24:26 +02:00
Anton Lydike
61540dfcb7 [docs] improved documentation build 2022-03-27 20:23:10 +02:00
Anton Lydike
b5e20ed39b added docstrings to Int32 and UInt32 classes 2022-03-27 20:22:31 +02:00
Anton Lydike
4ca475da69 improved the MMU.translate_address function 2022-03-27 20:22:11 +02:00
Anton Lydike
cc3df91fd1 [restructured] moved more types and exceptions to riscemu.types 2022-03-27 19:11:10 +02:00
Anton Lydike
bc26ed3a02 [restructured] moved all simple type definitions into riscemu.types 2022-03-27 19:06:23 +02:00
Anton Lydike
254410e9cc [priv] fixed error in halt csr 2022-03-27 18:45:59 +02:00
Anton Lydike
26d0a165f7 [priv] added --slowdown flag to slow down emulated clock speed 2022-03-27 18:45:28 +02:00
Anton Lydike
cadccaef00 [priv] fixed printing for mret, sret and uret 2022-03-27 18:44:41 +02:00
Anton Lydike
71093fe72f Maor round of bugfixes and incremental improvements 
- fixed errors in TextIO and IOModule
 - moved to Int32 and UInt32 based arithmetic
 - added a lot of end-to-end and other tests
 2022-03-27 15:21:10 +02:00
Anton Lydike
cd5795bb74 fixed priv start code, added tests 2022-02-18 10:17:12 +01:00
Anton Lydike
4f1c73df9e various small bugfixes 2022-02-13 19:44:56 +01:00
Anton Lydike
881f4004ed fixed removed argparse line in riscemu.__init__.py 2022-02-13 19:43:44 +01:00
Anton Lydike
6fa3558f6c added interactive mode, fixed some bugs 2022-02-13 14:55:03 +01:00
Anton Lydike
3d2619c258 created a better output for reads/writes outside of known regions 2022-02-11 20:29:11 +01:00
Anton Lydike
185ae8b94e added config and better loading code to CPU base 2022-02-11 20:25:19 +01:00
Anton Lydike
2880a59dbb fixed ascii escape sequences and section address calculation 2022-02-11 18:53:26 +01:00
Anton Lydike
7904a4dae8 added verbosity control to user mode emulator 2022-02-11 18:31:23 +01:00
Anton Lydike
b396e0c5eb user mode emulator finally working again 2022-02-11 18:27:10 +01:00
Anton Lydike
5538034f8b started with base type overhaul 2022-02-11 13:32:02 +01:00
Anton Lydike
0488a9d6bc finished basic RISC-V parser 2022-01-18 21:08:07 +01:00
Anton Lydike
dc4dca6fea [wip] almost done with the rework of the parser and internal data structure representation of programs 2021-12-18 00:25:39 +01:00
Anton Lydike
84562de98f added tests for tokenizer 2021-12-14 07:33:17 +01:00
Anton Lydike
d5a4acef67 tokenizer reimplemented 2021-12-13 23:23:55 +01:00
Anton Lydike
52e189c226 fixed missing newline at the end of the file 2021-12-10 13:46:57 +01:00
Anton Lydike
b317974dcc made sure register values adhere to correct 32bit two's complement standard - fixes #4 2021-12-10 13:25:22 +01:00