[restructured] moved more types and exceptions to riscemu.types

riscemu/CPU.py

@@ -14,7 +14,7 @@ from .config import RunConfig
 from .MMU import MMU
 from .colors import FMT_CPU, FMT_NONE
 from .debug import launch_debug_session
-from .exceptions import RiscemuBaseException, LaunchDebuggerException
+from .types.exceptions import RiscemuBaseException, LaunchDebuggerException
 from .syscall import SyscallInterface, get_syscall_symbols
 from .types import CPU, ProgramLoader, Int32, BinaryDataMemorySection
 from .parser import AssemblyFileLoader

riscemu/MMU.py

@@ -7,10 +7,10 @@ SPDX-License-Identifier: MIT
 from typing import Dict, List, Optional, Union
 
 from .colors import *
-from .exceptions import InvalidAllocationException, MemoryAccessException
 from .helpers import align_addr
 from .types import Instruction, MemorySection, MemoryFlags, T_AbsoluteAddress, \
     Program, InstructionContext, Int32
+from .types.exceptions import InvalidAllocationException, MemoryAccessException
 
 
 class MMU:

riscemu/__init__.py

@@ -8,7 +8,7 @@ This package aims at providing an all-round usable RISC-V emulator and debugger
 It contains everything needed to run assembly files, so you don't need any custom compilers or toolchains
 """
 
-from .exceptions import RiscemuBaseException, LaunchDebuggerException, InvalidSyscallException, LinkerException, \
+from .types.exceptions import RiscemuBaseException, LaunchDebuggerException, InvalidSyscallException, LinkerException, \
     ParseException, NumberFormatException, InvalidRegisterException, MemoryAccessException, OutOfMemoryException
 
 from .instructions import *

riscemu/assembler.py

@@ -3,7 +3,7 @@ from typing import List
 from typing import Optional, Tuple, Union
 
 from .colors import FMT_PARSE, FMT_NONE
-from .exceptions import ParseException, ASSERT_LEN
+from riscemu.types.exceptions import ParseException, ASSERT_LEN
 from .helpers import parse_numeric_argument, align_addr, get_section_base_name
 from .tokenizer import Token
 from .types import Program, T_RelativeAddress, InstructionContext, Instruction, BinaryDataMemorySection, InstructionMemorySection

riscemu/helpers.py

@@ -7,8 +7,8 @@ SPDX-License-Identifier: MIT
 from math import log10, ceil
 from typing import Iterable, Iterator, TypeVar, Generic, List, Optional
 
-from .exceptions import *
-import types
+from .types.exceptions import *
+from .types import Int32, UInt32
 
 
 def align_addr(addr: int, to_bytes: int = 8) -> int:
@@ -55,10 +55,10 @@ def format_bytes(byte_arr: bytearray, fmt: str, group: int = 1, highlight: int =
         return highlight_in_list(['0x{}'.format(ch.hex()) for ch in chunks], highlight)
     if fmt == 'int':
         spc = str(ceil(log10(2 ** (group * 8 - 1))) + 1)
-        return highlight_in_list([('{:0' + spc + 'd}').format(types.Int32(ch)) for ch in chunks], highlight)
+        return highlight_in_list([('{:0' + spc + 'd}').format(Int32(ch)) for ch in chunks], highlight)
     if fmt == 'uint':
         spc = str(ceil(log10(2 ** (group * 8))))
-        return highlight_in_list([('{:0' + spc + 'd}').format(types.UInt32(ch)) for ch in chunks],
+        return highlight_in_list([('{:0' + spc + 'd}').format(UInt32(ch)) for ch in chunks],
                                  highlight)
     if fmt == 'ascii':
         return "".join(repr(chr(b))[1:-1] for b in byte_arr)

riscemu/instructions/RV32A.py

@@ -1,5 +1,5 @@
 from .instruction_set import InstructionSet, Instruction
-from ..exceptions import INS_NOT_IMPLEMENTED
+from riscemu.types.exceptions import INS_NOT_IMPLEMENTED
 from ..types import Int32, UInt32
 
 

riscemu/instructions/RV32I.py

@@ -8,8 +8,7 @@ from .instruction_set import *
 from ..CPU import UserModeCPU
 
 from ..colors import FMT_DEBUG, FMT_NONE
-from ..debug import launch_debug_session
-from ..exceptions import LaunchDebuggerException
+from riscemu.types.exceptions import LaunchDebuggerException
 from ..syscall import Syscall
 from ..types import Instruction, Int32, UInt32
 

riscemu/instructions/RV32M.py

@@ -5,7 +5,7 @@ SPDX-License-Identifier: MIT
 """
 
 from .instruction_set import *
-from ..exceptions import INS_NOT_IMPLEMENTED
+from riscemu.types.exceptions import INS_NOT_IMPLEMENTED
 
 
 class RV32M(InstructionSet):

riscemu/instructions/instruction_set.py

@@ -8,7 +8,7 @@ from typing import Tuple, Callable, Dict
 
 from abc import ABC
 from ..CPU import CPU
-from ..exceptions import ASSERT_LEN, ASSERT_IN
+from riscemu.types.exceptions import ASSERT_LEN, ASSERT_IN
 from ..types import Instruction, Int32, UInt32
 
 

riscemu/parser.py

@@ -8,10 +8,10 @@ from typing import Dict, Tuple, Iterable, Callable, List
 
 from .assembler import MemorySectionType, ParseContext, AssemblerDirectives
 from .colors import FMT_PARSE
-from .exceptions import ParseException
 from .helpers import Peekable
 from .tokenizer import Token, TokenType, tokenize
 from .types import Program, T_ParserOpts, ProgramLoader, SimpleInstruction
+from .types.exceptions import ParseException
 
 
 def parse_instruction(token: Token, args: Tuple[str], context: ParseContext):

riscemu/priv/PrivRV32I.py

@@ -5,7 +5,7 @@ SPDX-License-Identifier: MIT
 """
 
 from ..instructions.RV32I import *
-from ..exceptions import INS_NOT_IMPLEMENTED
+from riscemu.types.exceptions import INS_NOT_IMPLEMENTED
 from .Exceptions import *
 from .privmodes import PrivModes
 from ..colors import FMT_CPU, FMT_NONE

riscemu/tokenizer.py

@@ -7,10 +7,10 @@ SPDX-License-Identifier: MIT
 import re
 from dataclasses import dataclass
 from enum import Enum, auto
-from typing import List, Iterable, Optional
-from riscemu.decoder import RISCV_REGS
+from typing import List, Iterable
 
-from .exceptions import ParseException
+from riscemu.decoder import RISCV_REGS
+from riscemu.types.exceptions import ParseException
 
 LINE_COMMENT_STARTERS = ('#', ';', '//')
 WHITESPACE_PATTERN = re.compile(r'\s+')

riscemu/types/__init__.py

@@ -10,6 +10,7 @@ T_ParserOpts = Dict[str, any]
 
 NUMBER_SYMBOL_PATTERN = re.compile(r'^\d+[fb]$')
 
+# base classes
 from .flags import MemoryFlags
 from .int32 import UInt32, Int32
 from .instruction import Instruction
@@ -22,5 +23,7 @@ from .simple_instruction import SimpleInstruction
 from .instruction_memory_section import InstructionMemorySection
 from .binary_data_memory_section import BinaryDataMemorySection
 
-
-
+# exceptions
+from .exceptions import ParseException, NumberFormatException, MemoryAccessException, OutOfMemoryException, \
+    LinkerException, LaunchDebuggerException, RiscemuBaseException, InvalidRegisterException, \
+    InvalidAllocationException, InvalidSyscallException, UnimplementedInstruction

riscemu/types/binary_data_memory_section.py

@@ -1,5 +1,5 @@
 from . import MemorySection, InstructionContext, MemoryFlags, T_RelativeAddress, Instruction
-from ..exceptions import MemoryAccessException
+from ..types.exceptions import MemoryAccessException
 
 
 class BinaryDataMemorySection(MemorySection):

riscemu/types/exceptions.py

@@ -5,11 +5,11 @@ SPDX-License-Identifier: MIT
 """
 
 from abc import abstractmethod
-from .colors import *
+from ..colors import *
 import typing
 
 if typing.TYPE_CHECKING:
-    from .types import Instruction
+    from . import Instruction
 
 
 class RiscemuBaseException(BaseException):

riscemu/types/instruction_context.py

@@ -1,7 +1,7 @@
 from collections import defaultdict
 from typing import Dict, List, Optional
 
-from ..exceptions import ParseException
+from .exceptions import ParseException
 from ..types import T_AbsoluteAddress, T_RelativeAddress, NUMBER_SYMBOL_PATTERN