Anton Lydike
|
6351f1e84d
|
[PrivRV32I] fixed bug with blt backwards jumps missing by one
|
2021-06-06 09:55:15 +02:00 |
|
Anton Lydike
|
f14bd2b983
|
[PrivCPU, PrivRV32I] fixed bug where ebreaks where missed during debugging
|
2021-06-05 16:19:35 +02:00 |
|
Anton Lydike
|
c1110b9ce3
|
[ElfLoader] better formatting for jump and load/store instructions
|
2021-06-05 15:29:40 +02:00 |
|
Anton Lydike
|
37910018b9
|
[PrivRV32I] finally correct parsing of load/store instruction args
|
2021-06-05 15:29:06 +02:00 |
|
Anton Lydike
|
e4537f86d9
|
[PrivRV32I] implemented csrrwi instruction
|
2021-06-05 15:28:27 +02:00 |
|
Anton Lydike
|
c770cc05cf
|
[Priv Exceptions] added __str__ as __repr__ alias to CpuTrap to correctly format exceptions when printed
|
2021-06-05 15:25:39 +02:00 |
|
Anton Lydike
|
3e4920f5d9
|
[decoder] fixed bug when decoding add/sub instruction
|
2021-06-05 15:24:40 +02:00 |
|
Anton Lydike
|
849d5f4fc3
|
[decoder, ElfLoader] decoing an instruction now returns all args as int
|
2021-06-05 15:24:16 +02:00 |
|
Anton Lydike
|
f9b0bac245
|
[Priv Exceptions] fixed constructor typo in TimerInterrupt
|
2021-06-05 09:56:05 +02:00 |
|
Anton Lydike
|
9424390b65
|
[decoder] Added mret, sret, uret, wfi instruction decoding support
|
2021-06-05 09:54:58 +02:00 |
|
Anton Lydike
|
198d14d5fb
|
[Priv Exceptions] added __repr__ to CpuTrap class
|
2021-06-05 09:29:20 +02:00 |
|
Anton Lydike
|
ca3b4099d4
|
[Priv] moved CSR constants to a separate file
|
2021-06-05 09:27:03 +02:00 |
|
|
79369889f4
|
[CSR] fixed method naming for _addr_to_name (now _name_to_addr)
|
2021-06-04 20:37:08 +02:00 |
|
|
de261c4c43
|
[Priv] overhauled instruction architecture
|
2021-06-04 20:36:33 +02:00 |
|
|
c963fe3989
|
[Priv] small fixes for overlooked things
|
2021-05-26 18:40:42 +02:00 |
|
|
85af9b992f
|
[PrivCPU] overhaul of instruction cycle, adding more CSR interaction
|
2021-05-25 23:50:38 +02:00 |
|
|
7239212729
|
[CSR] adding virtual csr registers
|
2021-05-25 23:49:37 +02:00 |
|
|
6653ef7e7c
|
[CPU] set correct MISA
|
2021-05-25 11:14:52 +02:00 |
|
|
a1f29b9d97
|
[CPU] cleaned up constructor
|
2021-05-25 11:14:18 +02:00 |
|
|
49b59cd46a
|
[CSR] added read/write checks and unified name to addr resuloution
|
2021-05-25 10:49:54 +02:00 |
|
|
291f44a192
|
[CSR] unknown csr names now fail without exception
|
2021-05-25 10:24:24 +02:00 |
|
|
c4cd83701f
|
[CSR, PrivCPU] Added csr callback registration through decorator
|
2021-05-24 15:51:05 +02:00 |
|
|
504407c0d9
|
[CSR] adding callbacks to each csr block
|
2021-05-24 14:34:35 +02:00 |
|
Anton Lydike
|
db2b0b314b
|
[PrivCPU, PrivRV32I] fix for relative jumps and branches
|
2021-05-24 10:08:53 +02:00 |
|
Anton Lydike
|
6bd5cd1598
|
[ElfLoader] better formatting for load and save instructions
|
2021-05-24 10:08:01 +02:00 |
|
Anton Lydike
|
ed6912a060
|
[ElfLoader] added bounds check to elf loader and casting binary data to bytearray
|
2021-05-24 10:07:21 +02:00 |
|
Anton Lydike
|
55be71dcc3
|
[CSR] added time and timeh csr codes
|
2021-05-24 10:05:34 +02:00 |
|
Anton Lydike
|
3a79bfdada
|
[ElfLoader] also loading .sdata and .sbss sections now
|
2021-05-23 12:59:59 +02:00 |
|
Anton Lydike
|
3f11cd84ca
|
[decoder] fixed error with decoding slli type instructions
|
2021-05-23 12:58:47 +02:00 |
|
Anton Lydike
|
f3959be843
|
[decoder] now returning instruction number as third return value
|
2021-05-23 10:44:27 +02:00 |
|
Anton Lydike
|
0475d8d384
|
[CPU] added instruction XLEN attribute to CPU class to support multiple instruction lengths
|
2021-05-23 10:42:04 +02:00 |
|
Anton Lydike
|
c9a136d595
|
[instructions] fixed error in auipc command
|
2021-05-22 21:05:14 +02:00 |
|
Anton Lydike
|
ee0aac30c4
|
[instructions] moved regs and mmu to properties to work with janky PrivCPU
|
2021-05-22 21:04:43 +02:00 |
|
Anton Lydike
|
1bdf2e6efe
|
[mmu] fixed typo in docstring
|
2021-05-22 21:03:56 +02:00 |
|
Anton Lydike
|
c48a5efee3
|
[cpu] fixed formatting to include cpu class extensions
|
2021-05-22 21:03:37 +02:00 |
|
Anton Lydike
|
15da68995c
|
[priv] module now able to load and execute elf binaries
|
2021-05-22 21:02:36 +02:00 |
|
Anton Lydike
|
a4735db388
|
Added a decoder module which can deocde some RV32I/M instructions
Some of them even correctly O.o
|
2021-05-22 21:01:03 +02:00 |
|
Anton Lydike
|
483a3f2416
|
Priv: [wip] implementing privileged architecture
|
2021-05-19 12:14:43 +02:00 |
|
Anton Lydike
|
a2e206eaee
|
renamed CPU.__run -> CPU._run, it's now overwriteable by subclasses
|
2021-05-19 09:51:51 +02:00 |
|
Anton Lydike
|
fa22d76f13
|
Added libstring and documentation for the general library
|
2021-04-24 18:32:43 +02:00 |
|
Anton Lydike
|
6bb0ad3793
|
Added libstring and documentation for the general library
|
2021-04-24 18:32:35 +02:00 |
|
Anton Lydike
|
a645e6259a
|
Added more debugger documentation
|
2021-04-24 18:26:31 +02:00 |
|
Anton Lydike
|
462639ade7
|
Added run_ins method to debugger to run an instruction
|
2021-04-24 18:24:42 +02:00 |
|
Anton Lydike
|
5d484f08cf
|
Minor fixes like imports and edge-case handling
|
2021-04-24 18:24:11 +02:00 |
|
Anton Lydike
|
f45a37e705
|
Added MMU.get_bin_containing
|
2021-04-24 18:23:12 +02:00 |
|
Anton Lydike
|
ff5ba9a7ef
|
made CPU.run_instruction public
|
2021-04-24 18:20:06 +02:00 |
|
Anton Lydike
|
da895f00cd
|
added stack field to cpu
|
2021-04-24 18:19:37 +02:00 |
|
Anton Lydike
|
f646bf1f1d
|
added readthedocs badge
|
2021-04-23 22:08:59 +02:00 |
|
Anton Lydike
|
6436f8930a
|
fixed stack docs in README
|
2021-04-23 22:01:09 +02:00 |
|
Anton Lydike
|
d72f83d19c
|
derp: wrong url to readthedocs in readme
|
2021-04-23 21:58:21 +02:00 |
|