d72b6a0df6
syscall: add partial support for mmap2 syscall
1 year ago
bd7f493248
misc: annotations and dead code removal
1 year ago
8ce7e3f8c6
fix jalr instruction to take arguments in the form of rd, rs, imm
2 years ago
1b26497e4c
base: add debug instructions
2 years ago
b5ebe13528
release 2.0.5
2 years ago
51d23a1630
updated .idea files
2 years ago
636e06f243
add an unlimited register mode
2 years ago
86063d64d7
version update: 2.0.4
2 years ago
5caf0d604d
rv32i: respect conf.debug_instruction setting
2 years ago
36e8c9c9ce
misc: fixed a typo in a docstring
2 years ago
f7e7c41034
Deploy RiscEmu in a JupyterLite distribution. ( #18 )
...
* Try and deploy a RiscEmu JupyterLite distribution.
* Add examples to the JupyterLite deployment.
* Add some demo notebooks and link to it in Readme.
Co-authored-by: Emilien Bauer <bauer.emilien@gmail.com>
2 years ago
1d65b236f4
Fix sign issue in parse_rd_rs_rs ( #16 )
2 years ago
be0591ed25
release of 2.0.3
3 years ago
d353353748
fixed link in syscall docs
3 years ago
ce5b01d463
Parser: fixed error when labels where used outside of sections
3 years ago
204d2c9a5b
Syscalls: cleaned up formatting and added instructions for extensions
3 years ago
10a3c4201e
cleaned up and improved memory dumping code
3 years ago
5a07770427
fixed a bug with hex literal recognition
3 years ago
39e759ae9b
fixed bug where wrong parts of section would be printed in mmu.dump()
3 years ago
65903189a2
removed tests for bind_twos_complement
3 years ago
629786931e
fixed address translation error for sections without symbols
3 years ago
bb770ab43c
Logging: Changed verbosity levels at which things are logged for the CPU
3 years ago
8dea2036c5
added changelog - release of 2.0.2
3 years ago
83d8412fff
add /build to idea excluded dirs
3 years ago
0c39a9eefb
fixes #12 - exit program with code from cpu.exit_code
3 years ago
761799c17a
Parser: fixes #13 - implicit start of text section when parsing assembly
...
When an assembly file starts with instructions without explicitly
declaring any section beforehand, a .text section will be created
implicitly.
3 years ago
baf4485143
release of 2.0.1
3 years ago
4d2d65a10d
fixed type annotations type in parsers
3 years ago
d18843a88b
release of 2.0.0
3 years ago
4b77ce05a7
Merge pull request #5 from AntonLydike/assembly-parser-rework
...
- Completely revamped parsing of readable assembly
- Completely revamped internal types
- Added hard and correct 32 bit integer handling in registers
3 years ago
fe4b3efb6f
fixes #10 - fixed how preconfigured memory is handled
3 years ago
663721b306
pre-release 2.0.0a4
3 years ago
4004c5ee6d
squashing bugs related to Int32 wrapping and sign extension
3 years ago
c2b6385523
version 2.0.0a3
3 years ago
b7f1365155
ported syscalls to Int32 usage and removed unecessary prints
3 years ago
fa4a9b92f3
fixed imports in types/instruction_memory_section
3 years ago
57f827ba6a
updated version to 2.0.0a2
3 years ago
61540dfcb7
[docs] improved documentation build
3 years ago
b5e20ed39b
added docstrings to Int32 and UInt32 classes
3 years ago
4ca475da69
improved the MMU.translate_address function
3 years ago
cc3df91fd1
[restructured] moved more types and exceptions to riscemu.types
3 years ago
bc26ed3a02
[restructured] moved all simple type definitions into riscemu.types
3 years ago
254410e9cc
[priv] fixed error in halt csr
3 years ago
26d0a165f7
[priv] added --slowdown flag to slow down emulated clock speed
3 years ago
cadccaef00
[priv] fixed printing for mret, sret and uret
3 years ago
71093fe72f
Maor round of bugfixes and incremental improvements
...
- fixed errors in TextIO and IOModule
- moved to Int32 and UInt32 based arithmetic
- added a lot of end-to-end and other tests
3 years ago
cd5795bb74
fixed priv start code, added tests
3 years ago
4f1c73df9e
various small bugfixes
3 years ago
881f4004ed
fixed removed argparse line in riscemu.__init__.py
3 years ago
6fa3558f6c
added interactive mode, fixed some bugs
3 years ago
Anton Lydike
Emilien Bauer
K-W-Li