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@ -64,7 +64,6 @@ See [docs/debugging.md](docs/debugging.md) for more info.
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* RISC-V reference card: https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/RISCVGreenCardv8-20151013.pdf
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* RISC-V reference card: https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/RISCVGreenCardv8-20151013.pdf
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## TODO:
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## TODO:
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* Move cpu instructions to different file, allow for instruction set selection and composition
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* Add a cycle limit to the options and CPU to catch infinite loops
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* Add a cycle limit to the options and CPU to catch infinite loops
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* Move away from `print` and use `logging.logger` instead
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* Move away from `print` and use `logging.logger` instead
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