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improved instruction parsing in RV32M

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This commit is contained in:
Anton Lydike 2021-04-19 09:48:06 +02:00
parent d8f46c781c
commit 7aa67cd4e1
1 changed files with 7 additions and 7 deletions
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14
riscemu/instructions/RV32M.py
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@ -11,7 +11,11 @@ class RV32M(InstructionSet):
)
def instruction_mulh(self, ins: 'LoadedInstruction'):
INS_NOT_IMPLEMENTED(ins)
rd, rs1, rs2 = self.parse_rd_rs_rs(ins)
self.regs.set(
rd,
(rs1 * rs2) >> 32
)
def instruction_mulhsu(self, ins: 'LoadedInstruction'):
INS_NOT_IMPLEMENTED(ins)
@ -27,9 +31,7 @@ class RV32M(InstructionSet):
)
def instruction_divu(self, ins: 'LoadedInstruction'):
rd, rs1, rs2 = self.parse_rd_rs_rs(ins)
rs1 = to_unsigned(rs1)
rs2 = to_unsigned(rs2)
rd, rs1, rs2 = self.parse_rd_rs_rs(ins, signed=False)
self.regs.set(
rd,
rs1 // rs2
@ -43,9 +45,7 @@ class RV32M(InstructionSet):
)
def instruction_remu(self, ins: 'LoadedInstruction'):
rd, rs1, rs2 = self.parse_rd_rs_rs(ins)
rs1 = to_unsigned(rs1)
rs2 = to_unsigned(rs2)
rd, rs1, rs2 = self.parse_rd_rs_rs(ins, signed=False)
self.regs.set(
rd,
rs1 % rs2