added run config
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6bc939572b
commit
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@ -4,25 +4,20 @@ from collections import defaultdict
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from .Exceptions import *
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from .helpers import *
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from .Config import RunConfig
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import typing
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if typing.TYPE_CHECKING:
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from . import MMU, Executable, LoadedExecutable, LoadedInstruction
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COLOR = True
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FMT_ORANGE = '\033[33m'
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FMT_GRAY = '\033[37m'
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FMT_BOLD = '\033[1m'
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FMT_NONE = '\033[0m'
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FMT_UNDERLINE = '\033[4m'
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class Registers:
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def __init__(self):
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def __init__(self, conf: RunConfig):
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self.vals = defaultdict(lambda: 0)
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self.last_mod = None
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self.last_access = None
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self.conf = conf
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def dump(self, small=False):
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named_regs = [self.reg_repr(reg) for reg in Registers.named_registers()]
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@ -67,6 +62,8 @@ class Registers:
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def reg_repr(self, reg):
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txt = '{:4}=0x{:08X}'.format(reg, self.get(reg))
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if not self.conf.color:
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return txt
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if reg == 'fp':
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reg = 's0'
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if reg == self.last_mod:
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@ -112,14 +109,16 @@ class Registers:
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def named_registers():
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return ['zero', 'ra', 'sp', 'gp', 'tp', 'fp']
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class CPU:
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def __init__(self):
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def __init__(self, conf: RunConfig):
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from . import MMU, Executable, LoadedExecutable, LoadedInstruction
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self.mmu = MMU()
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self.mmu = MMU(conf)
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self.regs = Registers()
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self.pc = 0
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self.exit = False
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self.conf = conf
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self.syscall_int = SyscallInterface()
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@ -289,7 +288,6 @@ class CPU:
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if self.regs.get(reg1) < self.regs.get(reg2):
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self.pc = dest
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def instruction_bge(self, ins: 'LoadedInstruction'):
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INS_NOT_IMPLEMENTED(ins)
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@ -325,8 +323,9 @@ class CPU:
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INS_NOT_IMPLEMENTED(ins)
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def instruction_dbg(self, ins: 'LoadedInstruction'):
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import code
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code.interact(local=dict(globals(), **locals()))
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if self.conf.debug_instruction:
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import code
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code.interact(local=dict(globals(), **locals()))
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@staticmethod
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def all_instructions():
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@ -345,5 +344,3 @@ class SyscallInterface:
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def handle_syscall(self, scall: Syscall):
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print("syscall {} received!".format(scall.id))
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scall.registers.dump_reg_a()
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8
riscemu/Config.py
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8
riscemu/Config.py
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@ -0,0 +1,8 @@
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from dataclasses import dataclass
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@dataclass()
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class RunConfig:
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color = True
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preffered_stack_size = None
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debug_instruction = True
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@ -53,7 +53,7 @@ class InstructionMemorySection(MemorySection):
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]
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@dataclass(frozen=True)
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@dataclass()
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class Executable:
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run_ptr: Tuple[str, int]
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sections: Dict[str, MemorySection]
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@ -1,5 +1,4 @@
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from dataclasses import dataclass
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from .Config import RunConfig
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from .Executable import Executable, LoadedExecutable, LoadedMemorySection
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from .helpers import align_addr
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from .Exceptions import OutOfMemoryEsception
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@ -14,10 +13,11 @@ class MMU:
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binaries: List[LoadedExecutable]
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last_bin: Optional[LoadedExecutable] = None
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def __init__(self):
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def __init__(self, conf: RunConfig):
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self.sections = list()
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self.binaries = list()
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self.last_bin = None
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self.conf = conf
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def load_bin(self, bin: Executable):
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if self.last_bin is None:
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@ -27,6 +27,10 @@ class MMU:
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# align to 8 byte word
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addr = align_addr(addr)
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# apply preferred stack size from config
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if bin.stack_pref is None:
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bin.stack_pref = self.conf.preffered_stack_size
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loaded_bin = LoadedExecutable(bin, addr)
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if loaded_bin.size + addr > self.max_size:
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0
riscemu/Registers.py
Normal file
0
riscemu/Registers.py
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@ -10,4 +10,6 @@ from .ExecutableParser import ExecutableParser
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from .MMU import MMU
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from .CPU import CPU, Registers, Syscall, SyscallInterface
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from .CPU import CPU, Registers, Syscall, SyscallInterface
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from .Config import RunConfig
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@ -36,3 +36,8 @@ def int_from_bytes(bytes):
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return num - 2 ** (8 * len(bytes))
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return num
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FMT_ORANGE = '\033[33m'
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FMT_GRAY = '\033[37m'
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FMT_BOLD = '\033[1m'
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FMT_NONE = '\033[0m'
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FMT_UNDERLINE = '\033[4m'
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0
riscemu/main.py
Normal file
0
riscemu/main.py
Normal file
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