unified instruction parsing code
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d3fe6cb1a9
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@ -30,6 +30,21 @@ class InstructionSet(ABC):
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def parse_mem_ins(self, ins: 'LoadedInstruction'):
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return self.cpu.parse_mem_ins(ins)
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def parse_rd_rs_rs(self, ins: 'LoadedInstruction'):
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ASSERT_LEN(ins.args, 3)
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return ins.get_reg(0), self.get_reg_content(ins, 1), self.get_reg_content(ins, 2)
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def parse_rd_rs_imm(self, ins: 'LoadedInstruction'):
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ASSERT_LEN(ins.args, 3)
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return ins.get_reg(0), self.get_reg_content(ins, 1), ins.get_imm(2)
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def get_reg_content(self, ins: 'LoadedInstruction', ind: int):
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"""
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get the register name from ins and then return the register contents
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"""
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return self.regs.get(ins.get_reg(ind))
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@property
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def pc(self):
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return self.cpu.pc
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@ -226,24 +226,24 @@ class RV32I(InstructionSet):
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def instruction_bge(self, ins: 'LoadedInstruction'):
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ASSERT_LEN(ins.args, 3)
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reg1 = self.get_reg(ins, 0)
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reg2 = self.get_reg(ins, 1)
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dest = self.get_reg(ins, 2)
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reg1 = self.get_reg_content(ins, 0)
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reg2 = self.get_reg_content(ins, 1)
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dest = ins.get_imm(2)
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if reg1 >= reg2:
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self.pc = dest
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def instruction_bltu(self, ins: 'LoadedInstruction'):
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ASSERT_LEN(ins.args, 3)
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reg1 = self.get_reg(ins, 0)
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reg2 = self.get_reg(ins, 1)
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reg1 = self.get_reg_content(ins, 0)
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reg2 = self.get_reg_content(ins, 1)
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dest = ins.get_imm(2)
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if to_unsigned(reg1) < to_unsigned(reg2):
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self.pc = dest
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def instruction_bgeu(self, ins: 'LoadedInstruction'):
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ASSERT_LEN(ins.args, 3)
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reg1 = to_unsigned(self.get_reg(ins, 0))
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reg2 = to_unsigned(self.get_reg(ins, 1))
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reg1 = to_unsigned(self.get_reg_content(ins, 0))
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reg2 = to_unsigned(self.get_reg_content(ins, 1))
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dest = ins.get_imm(2)
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if reg1 >= reg2:
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self.pc = dest
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@ -292,6 +292,3 @@ class RV32I(InstructionSet):
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def instruction_nop(self, ins: 'LoadedInstruction'):
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pass
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def get_reg(self, ins: 'LoadedInstruction', ind: int):
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return self.regs.get(ins.get_reg(ind))
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