kernel-mode #1
@ -32,7 +32,15 @@ class PrivRV32I(RV32I):
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self.cpu.csr.set(csr_addr, new_val)
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self.cpu.csr.set(csr_addr, new_val)
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def instruction_csrrs(self, ins: 'LoadedInstruction'):
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def instruction_csrrs(self, ins: 'LoadedInstruction'):
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INS_NOT_IMPLEMENTED(ins)
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rd, rs, csr_addr = self.parse_crs_ins(ins)
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if rs != 'zero':
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# oh no, this should not happen!
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INS_NOT_IMPLEMENTED(ins)
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if rd != 'zero':
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self.cpu.csr.assert_can_read(self.cpu.mode, csr_addr)
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old_val = self.cpu.csr.get(csr_addr)
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self.regs.set(rd, old_val)
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def instruction_csrrc(self, ins: 'LoadedInstruction'):
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def instruction_csrrc(self, ins: 'LoadedInstruction'):
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INS_NOT_IMPLEMENTED(ins)
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INS_NOT_IMPLEMENTED(ins)
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