From ee0aac30c43b4c1030d7b21db344d2bd4c192270 Mon Sep 17 00:00:00 2001 From: Anton Lydike Date: Sat, 22 May 2021 21:04:43 +0200 Subject: [PATCH] [instructions] moved regs and mmu to properties to work with janky PrivCPU --- riscemu/instructions/InstructionSet.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/riscemu/instructions/InstructionSet.py b/riscemu/instructions/InstructionSet.py index f5d0f01..6b55e7d 100644 --- a/riscemu/instructions/InstructionSet.py +++ b/riscemu/instructions/InstructionSet.py @@ -29,8 +29,6 @@ class InstructionSet(ABC): """ self.name = self.__class__.__name__ self.cpu = cpu - self.mmu = cpu.mmu - self.regs = cpu.regs def load(self) -> Dict[str, Callable[['LoadedInstruction'], None]]: """ @@ -132,6 +130,14 @@ class InstructionSet(ABC): def pc(self, val): self.cpu.pc = val + @property + def mmu(self): + return self.cpu.mmu + + @property + def regs(self): + return self.cpu.regs + def __repr__(self): return "InstructionSet[{}] with {} instructions".format( self.__class__.__name__,