merged assembly and cpu docs
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# The CPU
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The CPU emulates some RISC-V instructions:
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* all loads/stores: `lb, lh, lw, lbu, lhu, sw, sh, sb`
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* supported arg format is either `rd, imm(reg)` or `reg, reg, imm`
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* all branch statements: `beq, bne, blt, bge, bltu, bgeu`
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* all jumps `j, jal, jalr, ret`
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* basic arithmetic: `add, addi, sub` (not `lui, auipc`)
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* shifts: `sll, slli, srl, srli, sra, srai`
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* `scall, ecall, sbreak, ebreak` (both `s` and `e` version are the same instrcution)
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* compares (non immediate): `slt, sltu`, not `slti, sltiu`
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* logiacl (non immediate): `and, or, xor` not (`andi, ori, xori`)
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# Assembly
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Assembly tokenization should be workiung completely. It knows what instructions the CPU implementation supports and parses based on them.
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Assembly tokenization should be working completely. It knows what instructions the CPU implementation supports and parses based on them.
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## Instructions
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* all loads/stores: `lb, lh, lw, lbu, lhu, sw, sh, sb`
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* supported arg format is either `rd, imm(reg)` or `rd, reg, imm`
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* all branch statements: `beq, bne, blt, bge, bltu, bgeu`
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* all jumps `j, jal, jalr, ret`
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* basic arithmetic: `add, addi, sub` (not `lui, auipc`)
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* shifts: `sll, slli, srl, srli, sra, srai`
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* `scall, ecall, sbreak, ebreak` (both `s` and `e` version are the same instruction)
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* compares (non immediate): `slt, sltu` (not `slti, sltiu`)
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* logical (non immediate): `and, or, xor` (not `andi, ori, xori`)
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All unimplemented instructions can be added quite easily
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## Pseudo-ops
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The following pseudo-ops are implemented as of yet:
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* `.space <len>` reverse <len> bytes of zero
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* `.ascii 'text'` put text into memory
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* `.asciiz 'text'` put text into memory (null terminated)
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* `.sextion .<name>` same as `.<name>` see sections:
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* `.section .<name>` same as `.<name>`, see sections
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* `.set <name>, <value>` to create a const symbol with a given value
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* `.global <name>` mark symbol `<name>` as a global symbol. It is available from all loaded programs
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## Sections:
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Currently only these three sections are supported:
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* `data` read-write data (non-executable)
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* `rodata` read-only data (non-executable)
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* `.text` executable data (read-only)
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* `text` executable data (read-only)
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## Allocating stack
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another pseudo-op is recognized: `.stack <len>`. This marks the executable as requesting at least `<len>` bytes of stack.
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If the loader repsects this wish, the sp is initialized pointing to the end of the stack.
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If the loader respects this wish, the sp is initialized pointing to the end of the stack.
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# The stack
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The stack is a continuous region of memory, located somewhere. The stack grows "downwards", meaning new values are pushed like this:
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```asm
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add sp, sp, -4
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sw a0, sp, 0
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```
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