From ca71e196c291bd45ad9dc93e055e3435947328d8 Mon Sep 17 00:00:00 2001
From: Anton Lydike <me@antonlydike.de>
Date: Mon, 30 Aug 2021 19:40:13 +0200
Subject: [PATCH] added verbose flag and improved verbose output

---
 riscemu/IO/TextIO.py      |  1 +
 riscemu/priv/PrivCPU.py   | 10 +++++-----
 riscemu/priv/PrivRV32I.py | 11 +++++++++++
 riscemu/priv/__main__.py  |  6 ++++--
 4 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/riscemu/IO/TextIO.py b/riscemu/IO/TextIO.py
index b51813b..d48d465 100644
--- a/riscemu/IO/TextIO.py
+++ b/riscemu/IO/TextIO.py
@@ -31,6 +31,7 @@ def _window_loop(textIO: 'TextIO'):
 
     except ImportError:
         print("[TextIO] module works best with PySimpleGui!")
+        textIO.set_sg_window(None)
 
 
 class TextIO(IOModule):
diff --git a/riscemu/priv/PrivCPU.py b/riscemu/priv/PrivCPU.py
index 1b92e1c..424c51d 100644
--- a/riscemu/priv/PrivCPU.py
+++ b/riscemu/priv/PrivCPU.py
@@ -111,10 +111,10 @@ class PrivCPU(CPU):
     def get_tokenizer(self, tokenizer_input):
         raise NotImplementedError("Not supported!")
 
-    def run(self):
+    def run(self, verbose: bool = False):
         print(FMT_CPU + '[CPU] Started running from 0x{:08X} ({})'.format(self.pc, "kernel") + FMT_NONE)
         self._time_start = time.perf_counter_ns() // self.TIME_RESOLUTION_NS
-        self._run()
+        self._run(verbose)
 
     def _init_csr(self):
         # set up CSR
@@ -170,7 +170,7 @@ class PrivCPU(CPU):
                 self._timer_step()
             self._check_interrupt()
             ins = self.mmu.read_ins(self.pc)
-            if verbose:
+            if verbose and self.mode == PrivModes.USER:
                 print(FMT_CPU + "   Running 0x{:08X}:{} {}".format(self.pc, FMT_NONE, ins))
             self.run_instruction(ins)
             self.pc += self.INS_XLEN
@@ -190,8 +190,8 @@ class PrivCPU(CPU):
         # select best interrupt
         # TODO: actually select based on the official ranking
         trap = self.pending_traps.pop()  # use the most recent trap
-        if not isinstance(trap, TimerInterrupt):
-            print(FMT_CPU + "[CPU] taking trap {}!".format(trap) + FMT_NONE)
+        if not isinstance(trap, TimerInterrupt) or True:
+            print(FMT_CPU + "[CPU] [{}] taking trap {}!".format(self.cycle, trap) + FMT_NONE)
 
         if trap.priv != PrivModes.MACHINE:
             print(FMT_CPU + "[CPU] Trap not targeting machine mode encountered! - undefined behaviour!" + FMT_NONE)
diff --git a/riscemu/priv/PrivRV32I.py b/riscemu/priv/PrivRV32I.py
index c61c344..cc7c26b 100644
--- a/riscemu/priv/PrivRV32I.py
+++ b/riscemu/priv/PrivRV32I.py
@@ -8,6 +8,7 @@ from ..instructions.RV32I import *
 from ..Exceptions import INS_NOT_IMPLEMENTED
 from .Exceptions import *
 from .privmodes import PrivModes
+from ..colors import FMT_CPU, FMT_NONE
 import typing
 
 if typing.TYPE_CHECKING:
@@ -78,6 +79,16 @@ class PrivRV32I(RV32I):
         mepc = self.cpu.csr.get('mepc')
         self.cpu.pc = mepc
 
+        sec = self.mmu.get_sec_containing(mepc)
+        if sec is not None:
+            print(FMT_CPU + "[CPU] [{}] returning to mode: {} in binary {}, section {}, addr 0x{:x}".format(
+                self.cpu.cycle,
+                PrivModes(mpp),
+                sec.owner,
+                sec.name,
+                mepc
+            ) + FMT_NONE)
+
     def instruction_uret(self, ins: 'LoadedInstruction'):
         raise IllegalInstructionTrap(ins)
 
diff --git a/riscemu/priv/__main__.py b/riscemu/priv/__main__.py
index 803487c..f9d3640 100644
--- a/riscemu/priv/__main__.py
+++ b/riscemu/priv/__main__.py
@@ -16,6 +16,8 @@ if __name__ == '__main__':
     parser.add_argument('--kernel', type=str, help='Kernel elf loaded with user programs', nargs='?')
     parser.add_argument('--image', type=str, help='Memory image containing kernel', nargs='?')
 
+    parser.add_argument('-v', '--verbose', help="Verbose output", action='store_true')
+
     args = parser.parse_args()
     mmu = None
 
@@ -26,10 +28,10 @@ if __name__ == '__main__':
 
     if mmu is None:
         print("You must specify one of --kernel or --image for running in privilege mode!")
+        sys.exit(1)
 
     cpu = PrivCPU(RunConfig(), mmu)
-
-    cpu.run()
+    cpu.run(args.verbose)