From baa1f24eb75bca9fc22ac56db0c05a7efeb6a31c Mon Sep 17 00:00:00 2001 From: Anton Lydike Date: Tue, 8 Jun 2021 14:42:44 +0200 Subject: [PATCH] [CpuTraps] fixed formatting for mcause registers --- riscemu/priv/Exceptions.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscemu/priv/Exceptions.py b/riscemu/priv/Exceptions.py index db3a544..2dcbbfd 100644 --- a/riscemu/priv/Exceptions.py +++ b/riscemu/priv/Exceptions.py @@ -50,7 +50,7 @@ class CpuTrap(BaseException): @property def mcause(self): - return (self.code << 31) + self.interrupt + return (self.interrupt << 31) + self.code def __repr__(self): name = "Reserved interrupt({}, {})".format(self.interrupt, self.code)