diff --git a/.readthedocs.yaml b/.readthedocs.yaml new file mode 100644 index 0000000..e69de29 diff --git a/riscemu/CPU.py b/riscemu/CPU.py index afb2949..43990b1 100644 --- a/riscemu/CPU.py +++ b/riscemu/CPU.py @@ -11,7 +11,7 @@ from typing import Tuple, List, Dict, Callable, Type from .Tokenizer import RiscVTokenizer -from .Syscall import SyscallInterface +from .Syscall import SyscallInterface, get_syscall_symbols from .Exceptions import RiscemuBaseException, LaunchDebuggerException from .MMU import MMU from .Config import RunConfig @@ -19,6 +19,8 @@ from .Registers import Registers from .debug import launch_debug_session from .colors import FMT_CPU, FMT_NONE, FMT_ERROR +import riscemu + import typing if typing.TYPE_CHECKING: @@ -32,7 +34,7 @@ class CPU: It is initialized with a configuration and a list of instruction sets. """ - def __init__(self, conf: RunConfig, instruction_sets: List[Type['InstructionSet']]): + def __init__(self, conf: RunConfig, instruction_sets: List[Type['riscemu.InstructionSet']]): """ Creates a CPU instance. @@ -53,7 +55,7 @@ class CPU: self.syscall_int = SyscallInterface() # load all instruction sets - self.instruction_sets: List['InstructionSet'] = list() + self.instruction_sets: List[riscemu.InstructionSet] = list() self.instructions: Dict[str, Callable[[LoadedInstruction], None]] = dict() for set_class in instruction_sets: ins_set = set_class(self) @@ -72,13 +74,13 @@ class CPU: """ return RiscVTokenizer(tokenizer_input, self.all_instructions()) - def load(self, e: 'Executable'): + def load(self, e: riscemu.Executable): """ Load an executable into Memory """ return self.mmu.load_bin(e) - def run_loaded(self, le: 'LoadedExecutable'): + def run_loaded(self, le: 'riscemu.LoadedExecutable'): """ Run a loaded executable """ diff --git a/riscemu/Exceptions.py b/riscemu/Exceptions.py index 0c26d83..cf7017d 100644 --- a/riscemu/Exceptions.py +++ b/riscemu/Exceptions.py @@ -4,9 +4,14 @@ RiscEmu (c) 2021 Anton Lydike SPDX-License-Identifier: BSD-2-Clause """ +import typing + from abc import abstractmethod from .colors import * +if typing.TYPE_CHECKING: + from .Executable import LoadedInstruction + class RiscemuBaseException(BaseException): @abstractmethod @@ -93,6 +98,7 @@ class OutOfMemoryException(RiscemuBaseException): # CPU Exceptions + class UnimplementedInstruction(RiscemuBaseException): def __init__(self, ins: 'LoadedInstruction'): self.ins = ins diff --git a/riscemu/__init__.py b/riscemu/__init__.py index 3555f9c..a7e9d5d 100644 --- a/riscemu/__init__.py +++ b/riscemu/__init__.py @@ -17,6 +17,8 @@ from .Executable import Executable, LoadedExecutable from .ExecutableParser import ExecutableParser +from .instructions import * + from .MMU import MMU from .Registers import Registers from .Syscall import SyscallInterface, Syscall diff --git a/riscemu/instructions/InstructionSet.py b/riscemu/instructions/InstructionSet.py index c7dfd49..b9fb7c8 100644 --- a/riscemu/instructions/InstructionSet.py +++ b/riscemu/instructions/InstructionSet.py @@ -9,6 +9,7 @@ from typing import Tuple, Callable, Dict from abc import ABC from ..CPU import CPU from ..helpers import ASSERT_LEN, ASSERT_IN, to_unsigned +from ..Executable import LoadedInstruction class InstructionSet(ABC): diff --git a/riscemu/instructions/RV32I.py b/riscemu/instructions/RV32I.py index 4c0aa55..8f2de40 100644 --- a/riscemu/instructions/RV32I.py +++ b/riscemu/instructions/RV32I.py @@ -11,6 +11,7 @@ from ..colors import FMT_DEBUG, FMT_NONE from ..debug import launch_debug_session from ..Exceptions import LaunchDebuggerException from ..Syscall import Syscall +from ..Executable import LoadedInstruction class RV32I(InstructionSet): diff --git a/sphinx-docs/.gitignore b/sphinx-docs/.gitignore new file mode 100644 index 0000000..e69de29 diff --git a/sphinx.py b/sphinx.py new file mode 100644 index 0000000..e69de29