misc: improve typing and structure
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parent
1c2dad94e2
commit
47a9b12263
10
.gitignore
vendored
10
.gitignore
vendored
@ -1,6 +1,8 @@
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venv
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__pycache__
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.mypy_cache
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dist/
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riscemu.egg-info
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build/
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.pytest_cache
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/venv*
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/dist
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/riscemu.egg-info
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/build
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@ -348,7 +348,7 @@ class MMU:
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return InstructionContext()
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def find_entrypoint(self) -> int | None:
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def find_entrypoint(self) -> Optional[int]:
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# try to find the global entrypoint
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if "_start" in self.global_symbols:
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return self.global_symbols["_start"]
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@ -12,7 +12,7 @@ from riscemu.riscemu_main import RiscemuMain
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try:
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main = RiscemuMain()
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main.run(sys.argv[1:])
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main.run_from_cli(sys.argv[1:])
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sys.exit(main.cpu.exit_code if not main.cfg.ignore_exit_code else 0)
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except RiscemuBaseException as e:
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@ -2,7 +2,7 @@ import argparse
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import glob
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import os
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import sys
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from typing import List, Type
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from typing import Type, Dict, List, Optional
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from riscemu import AssemblyFileLoader, __version__, __copyright__
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from riscemu.types import CPU, ProgramLoader, Program
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@ -17,21 +17,21 @@ class RiscemuMain:
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interoperability.
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"""
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available_ins_sets: dict[str, type[InstructionSet]]
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available_file_loaders: list[type[ProgramLoader]]
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available_ins_sets: Dict[str, Type[InstructionSet]]
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available_file_loaders: List[Type[ProgramLoader]]
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cfg: RunConfig | None
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cpu: CPU | None
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cfg: Optional[RunConfig]
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cpu: Optional[CPU]
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input_files: list[str]
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selected_ins_sets: list[Type[InstructionSet]]
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input_files: List[str]
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selected_ins_sets: List[Type[InstructionSet]]
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def __init__(self):
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self.available_ins_sets = dict()
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self.selected_ins_sets = []
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self.available_file_loaders = []
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self.cfg: RunConfig | None = None
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self.cpu: CPU | None = None
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self.cfg: Optional[RunConfig] = None
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self.cpu: Optional[CPU] = None
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self.input_files = []
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self.selected_ins_sets = []
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@ -129,7 +129,7 @@ class RiscemuMain:
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def register_all_program_loaders(self):
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self.available_file_loaders.append(AssemblyFileLoader)
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def parse_argv(self, argv: list[str]):
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def parse_argv(self, argv: List[str]):
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parser = argparse.ArgumentParser(
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description="RISC-V Userspace emulator",
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prog="riscemu",
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@ -153,7 +153,7 @@ class RiscemuMain:
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setattr(args, "ins", {k: True for k in self.available_ins_sets})
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# create RunConfig
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self.cfg = self.config_from_parsed_args(args)
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self.cfg = self.create_config(args)
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# set input files
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self.input_files = args.files
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@ -167,16 +167,23 @@ class RiscemuMain:
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# if use_libc is given, attach libc to path
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if self.cfg.use_libc:
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libc_path = os.path.join(
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os.path.dirname(__file__),
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"..",
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"libc",
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"*.s",
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)
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for path in glob.iglob(libc_path):
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self.add_libc_to_input_files()
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def add_libc_to_input_files(self):
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"""
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This adds the provided riscemu libc to the programs runtime.
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"""
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libc_path = os.path.join(
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os.path.dirname(__file__),
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"..",
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"libc",
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"*.s",
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)
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for path in glob.iglob(libc_path):
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if path not in self.input_files:
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self.input_files.append(path)
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def config_from_parsed_args(self, args: argparse.Namespace) -> RunConfig:
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def create_config(self, args: argparse.Namespace) -> RunConfig:
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# create a RunConfig from the cli args
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cfg_dict = dict(
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stack_size=args.stack_size,
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@ -208,7 +215,7 @@ class RiscemuMain:
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for p in programs:
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self.cpu.mmu.load_program(p)
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def run(self, argv: list[str]):
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def run_from_cli(self, argv: List[str]):
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# register everything
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self.register_all_isas()
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self.register_all_program_loaders()
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@ -221,6 +228,29 @@ class RiscemuMain:
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# run the program
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self.cpu.launch(self.cfg.verbosity > 1)
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def run(self):
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"""
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This assumes that these values were set externally:
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- available_file_loaders: A list of available file loaders.
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Can be set using .register_all_program_loaders()
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- cfg: The RunConfig object. Can be directly assigned to the attribute
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- input_files: A list of assembly files to load.
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- selected_ins_sets: A list of instruction sets the CPU should support.
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"""
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assert self.cfg is not None, "self.cfg must be set before calling run()"
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assert self.selected_ins_sets, "self.selected_ins_sets cannot be empty"
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assert self.input_files, "self.input_files cannot be empty"
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if self.cfg.use_libc:
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self.add_libc_to_input_files()
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self.instantiate_cpu()
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self.load_programs()
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# run the program
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self.cpu.launch(self.cfg.verbosity > 1)
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class OptionStringAction(argparse.Action):
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def __init__(self, option_strings, dest, keys=None, omit_empty=False, **kwargs):
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@ -7,7 +7,7 @@ SPDX-License-Identifier: MIT
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import sys
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from dataclasses import dataclass
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from math import log2, ceil
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from typing import Dict, IO
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from typing import Dict, IO, Union
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from .types import BinaryDataMemorySection, MemoryFlags
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from .colors import FMT_SYSCALL, FMT_NONE
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@ -70,7 +70,7 @@ class Syscall:
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def __repr__(self):
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return "Syscall(id={}, name={})".format(self.id, self.name)
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def ret(self, code: int | Int32):
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def ret(self, code: Union[int, Int32]):
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self.cpu.regs.set("a0", Int32(code))
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