From 3c0e357ca0ccc0f4923caf67c40411f6db3f48ff Mon Sep 17 00:00:00 2001 From: Anton Lydike Date: Sun, 18 Apr 2021 00:09:26 +0200 Subject: [PATCH] minor bugfixes and missing members corrected --- riscemu/CPU.py | 20 ++++++++------------ riscemu/arithmetic.py | 0 run.py | 5 ++--- 3 files changed, 10 insertions(+), 15 deletions(-) delete mode 100644 riscemu/arithmetic.py diff --git a/riscemu/CPU.py b/riscemu/CPU.py index 311cd91..ad752dd 100644 --- a/riscemu/CPU.py +++ b/riscemu/CPU.py @@ -1,5 +1,5 @@ import traceback -from dataclasses import dataclass +from typing import Tuple from .Exceptions import * from .helpers import * @@ -8,11 +8,11 @@ from .Registers import Registers from .Syscall import SyscallInterface, Syscall import typing + if typing.TYPE_CHECKING: from . import MMU, Executable, LoadedExecutable, LoadedInstruction - class CPU: def __init__(self, conf: RunConfig): from . import MMU @@ -23,7 +23,7 @@ class CPU: self.conf = conf self.mmu = MMU(conf) - self.regs = Registers() + self.regs = Registers(conf) self.syscall_int = SyscallInterface() def load(self, e: 'Executable'): @@ -48,10 +48,12 @@ class CPU: self.pc += 1 self.__run_instruction(ins) except RiscemuBaseException as ex: - print("[CPU] excpetion caught at {}:".format(ins)) + print(FMT_ERROR + "[CPU] excpetion caught at {}:".format(ins) + FMT_NONE) print(" " + ex.message()) traceback.print_exception(type(ex), ex, ex.__traceback__) + print("Program exited with code {}".format(self.exit_code)) + def __run_instruction(self, ins: 'LoadedInstruction'): name = 'instruction_' + ins.name if hasattr(self, name): @@ -276,9 +278,6 @@ class CPU: addr = ins.get_imm(0) self.pc = addr - def instruction_jr(self, ins: 'LoadedInstruction'): - INS_NOT_IMPLEMENTED(ins) - def instruction_jal(self, ins: 'LoadedInstruction'): reg = 'ra' # default register is ra if len(ins.args) == 1: @@ -305,11 +304,11 @@ class CPU: self.instruction_scall(ins) def instruction_ebreak(self, ins: 'LoadedInstruction'): - self.instruction_ebreak(ins) + self.instruction_sbreak(ins) def instruction_scall(self, ins: 'LoadedInstruction'): ASSERT_LEN(ins.args, 0) - syscall = Syscall(self.regs.get('a7'), self.regs) + syscall = Syscall(self.regs.get('a7'), self.regs, self) self.syscall_int.handle_syscall(syscall) def instruction_sbreak(self, ins: 'LoadedInstruction'): @@ -317,14 +316,11 @@ class CPU: import code code.interact(local=dict(globals(), **locals())) - def instruction_nop(self, ins: 'LoadedInstruction'): pass - @staticmethod def all_instructions(): for method in vars(CPU): if method.startswith('instruction_'): yield method[12:] - diff --git a/riscemu/arithmetic.py b/riscemu/arithmetic.py deleted file mode 100644 index e69de29..0000000 diff --git a/run.py b/run.py index 9fe026a..ae0f959 100644 --- a/run.py +++ b/run.py @@ -21,7 +21,7 @@ loop: # exit gracefully addi a0, zero, 0 addi a7, zero, 93 - dbg # launch debugger + ebreak # launch debugger scall # exit with code 0 """ tk = RiscVTokenizer(RiscVInput(example_progr)) @@ -36,11 +36,10 @@ loop: exe = ep.get_execuable() - cpu = CPU() + cpu = CPU(RunConfig()) le = cpu.load(exe) cpu.run_loaded(le) - print('a')