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38 lines
1.3 KiB
C
38 lines
1.3 KiB
C
#ifndef H_CSR
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#define H_CSR
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#define CSR_MSTATUS 0x300 // machine status
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#define CSR_MISA 0x301 // machine ISA
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#define CSR_MIE 0x304 // machine interrupt enable
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#define CSR_MTVEC 0x305 // machine trap handler
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#define CSR_MSCRATCH 0x340 // machine scratch register
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#define CSR_MEPC 0x341 // machine exception program counter
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#define CSR_MCAUSE 0x342 // machine trap cause
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#define CSR_MTVAL 0x343 // machine bad address or instruction
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#define CSR_MIP 0x344 // machine interrupt pending
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#define CSR_TIME 0xC01 // time csr
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#define CSR_TIMEH 0xC81 // high bits of time
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#define CSR_MTIMECMP 0x780 // mtimecmp register for timer interrupts
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#define CSR_MTIMECMPH 0x781 // mtimecmph register for timer interrupts
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#define CSR_HALT 0x789 // writing nonzero value here will halt the cpu
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#define TIMECMP_MEM_ADDR 0xffff
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#define CSR_READ(csr_id, result) {\
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__asm__ ("csrr %0, %1" : "=r"((result)) : "I"((csr_id))); \
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}
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#define CSR_WRITE(csr_id, val) {\
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__asm__ ("csrw %0, %1" :: "I"((csr_id)), "r"((val))); \
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}
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#define HALT(code) {\
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__asm__("csrw %0, %1" :: "I"(CSR_HALT), "I"(code)); \
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}
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void write_mtimecmp(unsigned long long int mtimecmp);
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unsigned long long int read_time();
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#endif |